The present invention relates generally to the operation of measurement instruments. More specifically, the invention relates to measurement instruments consisting of analog-to-digital converters (ADCs) which are used to sample and digitize an analog signal, converting the analog signal to a sequence of values whose magnitude represents the voltage of the signal and the time location in the sequence represents when the signal was sampled. Furthermore, the present invention relates to digitizing systems, which consist of multiple, interleaved ADCs.
Systems used to digitize analog signals utilize ADCs that sample an analog signal at a time specified by a sample clock that is fed to the ADC. On prescribed rising and/or falling edges of this sample clock, the ADC samples the analog signal providing a digital value at its output. This digital value is typically stored in a memory of some sort for later use.
Waveform digitizing systems such as digital oscilloscopes are used by scientists and engineers to build ever faster electronic equipment. Because the speed of electronic equipment continues to increase, there is an ever increasing demand for faster waveform digitizing systems. For very fast waveform digitizing requirements, the speed demands placed on waveform digitizing systems exceed the physical capabilities of ADCs. In other words, ADCs cannot sample signals fast enough to meet the demands of the electronics industry and the scientific community.
In order to overcome this physical limitation and make waveform digitizing systems that sample signals at a higher rate, a technique called time interleaving is often used. Interleaving involves the usage of multiple ADCs in a waveform digitizing system. These ADCs are used in a manner in which generally all ADCs sample at the same rate, but they sample the signal at different times. For example, a waveform digitizing system utilizing two ADCs could sample a signal at an effective sample rate equal to the sum of each ADC sample rate if each ADC took every other sample of the signal. At the end of such a waveform acquisition, the resulting array of data points would contain data where half of the data were generated from one ADC and the other half from the other. More specifically, every other point in the resulting acquired signal would have been acquired by one of the ADCs while the remaining points were acquired by the other. This method of interleaving ADCs has been used with great success.
While bandwidth and sample rates of waveform digitizer systems are perhaps the most important qualities, signal fidelity is equally important. In other words, the waveform digitizing system is expected to produce a digital representation of the sampled analog waveform with a high degree of accuracy. Said differently, the digitizing system is expected to faithfully reproduce an image of the analog signal being digitized. In systems utilizing a single ADC to digitize a waveform, the problem of faithful reproduction of the analog signal reduces to the solution of engineering problems in the design of the digitizer system involving front-end non-linearity and noise, ADC integral and differential non-linearity, sample clock accuracy and stability etc. In interleaved systems, these problems are exacerbated by the use of multiple digitizers.
In interleaved systems, to avoid degradation, the signal path to each digitizer must have identical characteristics. Any time delay, attenuation or gain applied differently in the path to each digitizer will result in noticeable degradation of the quality of the acquired signal. The same must be said for the sample clock delivery to the digitizers. Any variation in the timing from digitizer to digitizer will reduce the signal quality. Furthermore, each digitizer or ADC in an interleaved system will have characteristics that may vary from the other digitizers, the most important characteristic being frequency response. Differing frequency response manifests itself as a mismatching gain and time, or phase delay of the signal at various frequencies. Differences in frequency response are more likely at higher frequencies where digitizer matching becomes more difficult. As mentioned previously, high bandwidth is another feature desired of digitizing systems, and high bandwidth means that high frequency signals or signals with components at high frequencies are being digitized. This means that matching digitizer frequency response characteristics is a particular problem in high bandwidth systems that are used to digitize high frequency signals.
The current state of technology deals with these problems in several ways. In the design of a digital oscilloscope or other waveform digitizing system, good engineering practice is applied to ensure that the sample clock does not jitter and is delivered accurately to each digitizer. Furthermore, the paths to each digitizer are carefully designed and routed to provide as good signal path matching as practically possible. Finally, demands are placed on the design of ADC chips to meet stringent frequency response specifications.
Additionally, ADCs are sometimes built with controls provided to precisely adjust the offset, gain, and sample clock delay to the ADC. Some systems dynamically measure and adjust the offset, gain and delay characteristics of the individual digitizers in the interleaved system using internal calibration signals and hardware controls. Even with the provision of these controls, it is still impossible to adjust for gain and delay characteristics of the digitizers that vary with frequency.
An effect of mismatched digitizers is the creation of spurs that degrade signal fidelity and effective number of bits (ENOB).
To deal with frequency dependent interleaved digitizer mismatch, several methods have been proposed.
In U.S. Pat. No. 7,978,104, filed Jun. 21, 2007 titled “Compensation of Mismatch Errors in a Time-interleaved Analog-to-digital Converter” to Johansson, a time-domain polyphase filter is disclosed for performing interleave correction.
In U.S. Pat. No. 6,567,030, filed Feb. 27, 2002, titled “Sample Synthesis for Matching Digitizers in Interleaved Systems” to Pupalaikis, a feedback structure is employed for performing interleave correction.
In U.S. Pat. No. 6,819,279, filed Mar. 5, 2003, titled “Method and Apparatus for the Recovery of Signals Acquired by an Interleaved System of Digitizers with Mismatching Frequency Response Characteristics” to Pupalaikis, a frequency-domain correction method preferably employing the discrete Fourier transform (DFT) is disclosed.
In U.S. Pat. No. 7,386,409, filed Nov. 16, 2005, titled “Method and Apparatus for Artifact Signal Reduction in Systems of Mismatched Interleaved Digitizers” to Mueller, et al, a time-domain, filter based system for directly targeting spur tones is disclosed.
These methods attempt to compensate for error due to interleave mismatch, but require a priori knowledge of the digitizer mismatch characteristics. This a priori knowledge can be gained by factory calibration with reference signals or during internal instrument calibration utilizing built in standards. Factory calibration is possible in some instruments such as oscilloscopes, but this calibration degrades over time due to temperature and drift. Internal calibration signals are generally expensive, especially for very high frequencies and internal calibration must generally be performed with the digitizers offline.
What is needed are methods of determining correction information for use with, for example, the aforementioned methods utilizing user signals applied to the system during normal operation.
In U.S. Pat. No. 7,741,982, filed Feb. 4, 2005, titled “Estimation of Timing Errors in a Time-interleaved Analog-to-digital Converter System” to Johansson, et al., a method is provided for specifically estimating timing errors for incorporation into a correction, but there are limitations on signals usable for estimation of timing errors that are onerous and not generally applicable to time-interleaved systems and anyway only addresses timing error or delay match.
Some methods include U.S. Pat. No. 8,441,379, filed Feb. 11, 2009 titled “Device and Method for Digitizing a Signal” to Eklund et al. This method provides for on-the-fly correction for interleave error but pertains to sub-banded acquisition systems containing overlapping sub-bands and does not pertain to the general time-interleaving problem.
In U.S. Pat. No. 8,307,248, filed Jun. 30, 2006 titled “Method and a System for Estimating Errors Introduced in a Time-interleaved Analog-to-digital Converter System” to Johansson et al, the inventors provide means for on-the-fly calibration of an interleave correction system using unknown input signals, but the method is an iterative, loss minimization method pertaining to gain, offset and delay mismatch. Thus, a loss function representing a difference between a reference signal and remaining signals is employed. While gain, offset and delay mismatch are certainly important criteria in interleaved digitizer matching, the frequency dependent aspects are also of importance and the invention does not address this. Furthermore, the loss function is such that it is used in an estimation that minimizes the differences between a reference and remaining signals and does not directly address spur tones arising from interleave mismatch.
The inventors of the present invention have recognized that these methods each suffer from combinations of problems including lack of handling of frequency dependent digitizer mismatch as occurs from general frequency response mismatch, lack of directly targeting spurious tones arising from interleave mismatch, requirements for different topologies such as sub-banded architectures, and iterative non-linear equation solving methods.
What is needed is a system for on-the-fly correction for interleave mismatch that provides for correction of frequency dependent effects and directly targets spurious tones arising from said mismatch. What is further needed is a system that is capable of correction based on user supplied signals.